Exploiting Structural Similarities in a BDD-Based Verification Method

A major challenge in the area of hardware veriication is to devise methods that can handle circuits of practical size. This paper intends to show how the applicability of combinational circuit veriication tools based on binary decision diagrams (BDDs) can be greatly improved. The introduction of dynamic variable ordering techniques already makes these tools more robust; a designer no longer needs to worry about a good initial variable order. In addition, we present a novel approach combining BDDs with a technique that exploits structural similarities of the circuits under comparison. We explain how these similarities can be detected and put to eeective use in the veriication process. Benchmark results show that the proposed method signiicantly extends the range of circuits that can be veriied using BDDs.